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Hardware components.html (3133B)


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      3 <html><head><link rel="stylesheet" href="sitewide.css" /><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"/><meta name="exporter-version" content="Evernote Mac 6.13.1 (455785)"/><meta name="altitude" content="-0.3722517490386963"/><meta name="author" content="Alex Balgavy"/><meta name="created" content="2017-12-14 3:50:52 PM +0000"/><meta name="latitude" content="52.3330098593966"/><meta name="longitude" content="4.865517190619684"/><meta name="source" content="desktop.mac"/><meta name="updated" content="2017-12-16 10:58:33 PM +0000"/><title>Hardware components</title></head><body><div><b>Von Neumann Architecture</b></div><div><img src="Hardware%20components.resources/1200px-Von_Neumann_Architecture.svg.png" height="694" width="1200"/></div><div><br/></div><div><b>Organisation of the Central Processing Unit (CPU)</b></div><div><b><br/></b></div><div><img src="Hardware%20components.resources/CPU.png" height="571" width="691"/></div><div><b><br/></b></div><div><span style="font-weight: bold;">Register file</span></div><div>small and fast memory block, array of storage elements</div><div>circuitry that enables data to be read from or written to any register</div><div>access circuitry:</div><div><ul><li>read</li><ul><li>enables two registers to be read at the same time</li><li>has two address inputs to select registers to be read</li><li>dual-ported: contents of two registers is available via two separate outputs A and B (ports)</li></ul><li>write</li><ul><li>data input C and corresponding address input for read</li></ul></ul><div><br/></div></div><div>how to realise dual-ported memory units:</div><div><br/></div><div><div><br/></div><table style="border-collapse: collapse; min-width: 100%;"><colgroup><col style="width: 298px;"/><col style="width: 340px;"/></colgroup><tbody><tr><td style="border: 1px solid rgb(255, 255, 255); width: 298px; padding: 8px;"><div>Single memory block</div></td><td style="border: 1px solid rgb(255, 255, 255); width: 340px; padding: 8px;"><div>Two memory blocks</div></td></tr><tr><td style="border: 1px solid rgb(255, 255, 255); width: 298px; padding: 8px;"><div><img src="Hardware%20components.resources/screenshot.png" height="346" width="332"/><br/></div></td><td style="border: 1px solid rgb(255, 255, 255); width: 340px; padding: 8px;"><div><img src="Hardware%20components.resources/screenshot_2.png" height="341" width="415"/><br/></div></td></tr></tbody></table><div><br/></div></div><div><span style="font-weight: bold;">ALU</span></div><div>used to manipulate data, performs add/subtract and logic (AND, OR, XOR)</div><div>two inputs — one from register out A, one from multiplexer</div><div>multiplexer either selects register out B, or immediate value in IR</div><div>output is connected to data input of registers</div><div><br/></div><div><img src="Hardware%20components.resources/screenshot_1.png" height="591" width="484"/><br/></div><div><br/></div><div><br/></div></body></html>