index.md (1304B)
1 +++ 2 title = 'Flip-flops' 3 +++ 4 # Flip-flops 5 ## SR Latch 6 7 Circuit of two NOR gates that can ‘remember’ which input was most recently 1 (in this case, R). 8 9 The state R = S = 0 is undefined, the state R = S = 1 is unused. 10 11  12 13 ## Gated SR Latch 14 15 When the time at which to set or reset is controlled by a clock instead of the inputs 16 17 When the clock is at 1, signals R’ and S’ change based on R and S. 18 When the clock is at 0, no change in the state can happen. 19 20 Implementation with NAND gates? Just replace every gate with a NAND. It works. Trust me, I’m a computer scientist. 21 22  23 24 ## Gated D latch 25 26 Instead of using two separate inputs, you can derive the inputs from one input, D (data): 27 28  29 30 ## T flip-flop 31 changes state every clock cycle if its input T is 1 — "toggles state" 32 33  34 35 ## Master-slave flip-flop 36 37 What if you don’t want a change in the input to be immediately propagated to the output? 38 39 Connect two gated D latches to create a master-slave flip-flop. 40 41 While clock is 1, master is affected by changes in D but slave stays in the same state. 42 43 When clock changes from 1 to 0, output is propagated to the slave. 44 45 