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Lecture notes from university.
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Cache memory.html (2755B)


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      3 <html><head><link rel="stylesheet" href="sitewide.css" /><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"/><meta name="exporter-version" content="Evernote Mac 6.13.1 (455785)"/><meta name="altitude" content="-0.3490290641784668"/><meta name="author" content="Alex Balgavy"/><meta name="created" content="2017-12-17 6:39:12 PM +0000"/><meta name="latitude" content="52.37364222894153"/><meta name="longitude" content="4.836288522954751"/><meta name="source" content="desktop.mac"/><meta name="updated" content="2017-12-17 7:12:48 PM +0000"/><title>Cache memory</title></head><body><div>very small, very fast</div><div>between processor and main memory, its there to be a wingman and make the main memory look good in front of the processor</div><div><br/></div><div>locality of reference — many instructions in localised areas of the program are executed repeatedly during some time period</div><div><ul><li>temporal — recently executed is likely to be executed again soon</li><li>spatial — instructions close to a recently executed instruction are likely to be executed again soon</li></ul></div><div><br/></div><div>basically, whenever some info is needed, it should be brought into the cache. and might as well grab data at adjacent addresses too.</div><div><br/></div><div>cache block/line — set of contiguous address locations of some size</div><div><br/></div><div>the mapping function specifies correspondence between main memory blocks and those in cache</div><div>replacement algorithm decides which blocks to remove to make space for a newly referenced word</div><div><br/></div><div>cache hits</div><div><ul><li>processor issues read/write requests</li><li>cache control circuitry determines if the requested word is in cache</li><li>if read hit, data is read from cache &amp; main memory is not involved</li><li>if write hit, two options:</li><ul><li>write-through — both cache and main memory are updated</li><ul/><li>write-back — update only cache location and mark block with an associated flag bit (dirty/modified bit), main memory is updated later</li></ul></ul><div><br/></div></div><div>cache misses:</div><div><ul><li>read miss — the block containing the requested word is copied from main memory into cache, then the word is forwarded to the processor</li><ul><li>load-through — alternative approach where word is sent to processor as soon as it’s read from memory. less waiting time for processor, more complex circuitry.</li></ul><li>write miss — info is written directly into main memory</li></ul></div><div><br/></div></body></html>